SK Hynix Targets Edge AI With 3D Stacked DRAM-on-Logic

SK Hynix is shifting its memory strategy toward edge AI devices with a new 3D stacked DRAM-on-logic architecture. This change matters because it targets the growing demand for efficient processing in smartphones, wearables, and robots. The company is moving beyond its dominance in server-grade HBM to capture the next wave of AI hardware.

SK Hynix shifts memory strategy toward edge AI devices with a new 3D stacked DRAM-on-logic architecture

The core technology stacks DRAM directly on top of the logic chip rather than placing them side by side. This vertical integration cuts the distance data must travel between memory and the processor. SK Hynix is currently recruiting engineers and collaborating with US-based clients to design these joint chips. The goal is to create a compact solution that fits into space-constrained mobile devices.

• Technology: 3D Stacked DRAM-on-Logic
• Architecture: DRAM stacked directly on logic chip
• Target Market: Edge AI devices (smartphones, wearables, robots)
• Performance Benefits: Higher bandwidth, lower latency, improved power efficiency, better space utilization

This architecture delivers higher bandwidth and lower latency compared to traditional memory layouts. It also improves power efficiency and space utilization, which are critical factors for battery-powered gadgets. The move follows SK Hynix's recent success with High Bandwidth Memory in the AI server market. The company is applying similar stacking expertise to a different segment of the industry.

We touched on HBM4 vs HBF in our earlier Sk hynix coverage when comparing AI memory specs. SK Hynix also announced plans for High Bandwidth Flash in April 2024 as part of its broader memory portfolio expansion. The company is preparing for future commercialization but has not released a specific timeline for product launches. Engineers are currently in the preparation phase for these next-generation chips.

SK Hynix is actively building the engineering team required for this new memory architecture. The focus remains on joint design efforts with key clients in the United States. This development positions the company to compete in the expanding edge AI sector. The technology aims to solve connectivity bottlenecks in small form factor devices.