Samsung is developing a new packaging technology for mobile memory that could significantly boost bandwidth and capacity. The technology, called multi-stacked FOWLP, combines ultra-high aspect ratio copper pillars with fan-out wafer-level packaging.
New packaging uses 20:1 aspect ratio copper pillars
The copper pillars used in the new packaging have an aspect ratio of 15-20:1, up from the 3-5:1 used in current VCS packaging. According to ETNews, the new packaging increases bandwidth by 15-30% and memory stack capacity by over 1.5 times.
Samsung's new packaging may eventually appear in future Exynos chips, such as the Exynos 2800 or Exynos 2900. However, the commercialization timeline remains uncertain as the technology is still in development.
SK Hynix is also developing a similar packaging technology called HBS for mobile AI applications. Samsung has not confirmed when the new packaging will enter mass production.
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