SK Hynix HBM4 Mass Production Starts: 12-Layer Chips for Nvidia

SK Hynix has begun mass producing 12-layer HBM4 memory chips for Nvidia, a move that directly impacts the performance ceiling for next-generation AI accelerators. This supply ramp-up signals that the industry is moving past the prototype phase into actual hardware integration for high-density computing. Buyers and system integrators should note that this transition marks the end of the waiting period for HBM4-enabled platforms.

SK Hynix begins shipping 12-layer HBM4 memory to Nvidia for the Vera Rubin platform

The new memory module targets Nvidia's Vera Rubin AI platform and features a significant architectural shift in data handling. SK Hynix doubled the number of data transfer channels from 1024 in the previous HBM3E generation to 2048 in the new HBM4 design. This doubling of channels allows for a wider pipeline of data to reach the GPU cores without increasing the physical footprint of the stack.

Specifications

• Layers: 12
• Data Transfer Channels: 2048
• Transfer Speed: >10Gbps
• Data Processing: >2TB/s
• Energy Efficiency Improvement: >40%

Technical specifications for the 12-layer stack show transfer speeds exceeding 10Gbps, which surpasses the JEDEC standard limit of 8Gbps. Each single chip can process more than 2TB of data per second while improving energy efficiency by over 40% compared to its predecessor. These metrics suggest a substantial reduction in power consumption per terabyte of throughput for AI training workloads.

A direct quote from Kuai Keji confirms that SK Hynix has officially started mass production shipments of the 12-layer HBM4 for Nvidia, noting that the product is entering the capacity ramp-up phase. Counterpoint Research forecasts that SK Hynix will hold approximately 54% of the global HBM4 market share in 2026. We've been tracking HBM4 closely — see our earlier coverage on SK Hynix Unveils 48GB HBM4E Memory.

SK Hynix plans to expand HBM4 shipments globally starting in September 2024. The company is currently scaling production to meet the initial demand from Nvidia for the Vera Rubin platform. This timeline establishes the earliest availability window for systems utilizing this specific memory generation.