Samsung, SK hynix May Skip HBM4 Hybrid Bonding as JEDEC Relaxes Thickness Rules

JEDEC is considering relaxing the thickness standards for high-bandwidth memory, a shift that could reshape how Samsung and SK hynix manufacture their next-generation chips. The proposed change allows for thicker stacks, which simplifies production but may delay the adoption of more advanced bonding techniques. Buyers and system integrators should watch this closely because the manufacturing method directly impacts chip density and performance potential. This adjustment signals a pragmatic pivot in the industry's approach to scaling AI memory infrastructure.

JEDEC thickness relaxation shifts manufacturing strategy

The updated specifications target both HBM4 and HBM5, two critical memory types for modern data centers and high-performance computing. Under the new guidelines, the thickness standard could relax from the current 900 micrometers to 1,000 micrometers. This change applies to the base HBM4 tier as well as the upcoming HBM5 generation. The relaxation aims to reduce manufacturing complexity while maintaining the high bandwidth required by AI workloads.

• HBM4 Thickness Standard: Relaxed from 900 micrometers to 1,000 micrometers
• HBM5 Thickness Standard: Relaxed from 900 micrometers to 1,000 micrometers
• HBM4 Stack Layers: Potentially limited to 12 layers; 16-layer discussions inactive

A significant consequence of these relaxed standards is that Samsung and SK hynix might skip hybrid bonding technology for standard HBM4 chips. Hybrid bonding, which allows for extremely thin and dense connections, is now expected to be reserved for HBM4E or HBM5E instead. NVIDIA has reportedly pushed back on demand for high-stack HBM, which incentivizes vendors to delay the introduction of hybrid bonding. This strategic delay aligns with current market demand for stable, readily available memory solutions rather than cutting-edge prototypes.

Stack layer counts are also facing constraints, with discussions for 16-layer HBM stacks currently inactive. A ZDNet source indicated that even HBM4E products could stay at 12 layers due to these inactive discussions. The source stated that discussions for 16-layer HBM stacks are inactive and therefore even HBM4E products could stay at 12 layers. This limitation suggests that density gains will come from other areas rather than vertical stacking increases in the immediate term.

We looked at the last HBM4 update while tracking these industry shifts, noting the same balance between stability and innovation. The current trajectory favors production efficiency over maximum theoretical density for the base HBM4 tier. Vendors are prioritizing yield and availability while reserving advanced hybrid bonding for later, higher-end variants. This approach ensures a steady supply of capable memory for AI systems without the risks associated with unproven manufacturing steps.