Intel has added a new processor to its product lineup, listing the Xeon 6377P in its official database. The chip targets enterprise and server environments with a focus on performance-per-core efficiency rather than raw core count. The inclusion of the Xeon 6377P reflects Intel's focus on providing dedicated processors for server environments where high clock speeds are essential.
Server chip offers 12 P-cores and DDR5 support for enterprise tasks
The Xeon 6377P belongs to the Bartlett Lake family, which operates on the FCLGA1700 socket. Unlike many modern CPUs that mix performance and efficiency cores, this processor features only Performance cores. The design includes 12 P-cores and supports 24 threads simultaneously.
Specifications
- Cores/Threads: 12 P-cores / 24 threads
- Base Clock: 3.1 GHz
- Max Turbo Clock: 5.7 GHz
- Cache: 36MB
- TDP: 95W
Technical specifications highlight a base clock speed of 3.1 GHz and a maximum turbo frequency of 5.7 GHz. Intel confirms the chip has 36MB of cache and operates on a 16 GT/s bus interface. The processor is built using Intel 7 silicon technology and carries a thermal design power rating of 95W.
Memory support extends to up to 128GB of DDR5-4800 RAM across two channels, with ECC memory enabled for data integrity. The CPU provides PCIe 5.0 connectivity with up to 20 lanes available for expansion devices. The processor's support for up to 128GB of DDR5-4800 ECC memory and PCIe 5.0 makes it suitable for tasks demanding rapid data transfer rates.
The recommended customer price is listed at $1045 USD. Intel has not yet provided specific availability dates or regional distribution details beyond the database listing. With a recommended customer price of $1045 USD, the Xeon 6377P is positioned as an accessible option for enterprise deployments requiring reliable single-threaded performance.
This release follows earlier reports about Bartlett Lake processors entering Intel's product catalog. Designed for server and enterprise use, the chip offers consistent high-frequency processing through its 12 P-cores, avoiding the design complexity found in hybrid configurations.



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