AMD Spartan UltraScale+ SU200P FPGA Enters Mass Production in July 2026

AMD is expanding its Spartan UltraScale+ FPGA family with a larger, more powerful member. The SU200P targets data center board management, network switches, and industrial systems.

Largest and highest-performance Spartan FPGA

Built on a mature 16nm FinFET process, the SU200P is the highest-performance device in the Spartan UltraScale+ line. It shares package compatibility with the SU65P and Kintex UltraScale+ FPGAs, enabling easy scalability.

Specifications

• Process Node: 16nm FinFET
• Max I/O Pins: 572
• Memory: 18.0 Mb UltraRAM
• Transceivers: GTH
• PCIe: Gen4

The FPGA supports up to 572 I/O pins, PCIe Gen4, and GTH transceivers. It also includes dual hard memory controllers and 18.0 Mb of UltraRAM.

Hardware security is a key feature. The SU200P supports PQC CNSA 2.0, AES-GCM, PUF, and HWRoT for robust protection.

Mass production is scheduled for July 2026, according to AMD. The company confirmed the timeline in its announcement.