JEDEC Defines LPDDR6 Standard with 512GB Capacity and PIM Support

JEDEC announced the LPDDR6 standard on April 22, 2024. The organization plans to introduce a sub-channel mode with a half-bit-width x6 configuration. JEDEC also aims to support a system memory capacity of 512GB for this standard. The group is developing a SOCAMM2 module standard for LPDDR6. The organization is nearing completion of a processing-in-memory technology standard for the specification.

JEDEC supports flexible metadata separation for the LPDDR6 standard. This feature allows for adaptable handling of metadata within the memory architecture. The standard does not currently include any confirmed pricing information. No availability dates have been published for LPDDR6 modules. The announcement focuses on the technical framework rather than commercial release details.

JEDEC continues to define the architecture for next-generation mobile and embedded memory. The sub-channel mode and metadata separation address specific design requirements for modern systems. The development of the SOCAMM2 module standard provides a physical form factor for the technology. The processing-in-memory standard aims to integrate computational functions directly into the memory stack.

JEDEC outlines LPDDR6 specs including PIM and SOCAMM2 modules

JEDEC has outlined the technical direction for LPDDR6 without releasing commercial products. The standard targets high-capacity system memory and flexible data management. Engineers and manufacturers will use these specifications to design future hardware components. The organization will likely provide further updates as the standard development progresses.