Google is accelerating its shift away from reliance on third-party AI accelerators by deploying its own custom silicon at a massive scale. Supply chain reports indicate that the company plans to ship between 12 million and 15 million TPU chips by 2028. This volume will exceed NVIDIA's projected AI GPU sales of 12.4 million units in the same year. The move marks the first time Google's internal chip deployment is expected to surpass the market leader in unit count.

Supply chain reports project Google's custom silicon volume will exceed NVIDIA's AI GPU sales
The current generation, TPU v8, splits into two distinct hardware configurations to handle different workloads. The training-focused TPU v8T delivers 121 EFlops of FP4 performance and includes 2 PB of HBM memory. It connects chips using an internal bandwidth of 400 GB/s. The inference-optimized TPU v8i provides 11.6 EFlops of performance per node. Each v8i node contains 1152 chips, while a v8T pod node stacks 9600 chips.
Spec comparison
| Spec | TPU v8T | TPU v8i | TPU v9 |
|---|---|---|---|
| FP4 Performance | 121 EFlops | 11.6 EFlops | N/A |
| Memory | 2 PB HBM | N/A | N/A |
| Chips per Node | 9600 | 1152 | N/A |
| Packaging | N/A | N/A | 4-chip (EMIB) |
Google is preparing the next generation, TPU v9, to utilize advanced packaging techniques. The design will use a 4-chip packaging approach that incorporates Intel's EMIB technology. This architectural change supports the company's aggressive expansion targets. Intel has reportedly received an order for approximately 3 million TPU chips to support this v9 generation.
These supply chain projections suggest a fundamental change in the AI hardware landscape. Google's strategy relies on vertical integration to control both the silicon and the deployment scale. The transition to TPU v9 will likely define the efficiency and cost structure of large-scale AI training for years to come.
Google's TPU deployment is projected to reach 12-15 million units by 2028. This volume will surpass NVIDIA's projected AI GPU sales of 12.4 million units in 2028. TPU v8T offers 121 EFlops FP4 performance with 2PB HBM memory. TPU v8i is optimized for inference with 11.6 EFlops performance. TPU v9 will utilize 4-chip packaging and Intel's EMIB technology. Intel is expected to receive an order for approximately 3 million TPU chips for the v9 generation.



Discussion
0 comments
Log in to join the thread with a thoughtful take, question, or correction.