d-Matrix Raptor 3D DRAM Hits 100 TB/s Bandwidth at 1/10th HBM Power

AI workloads are hitting a wall where memory bandwidth and power consumption collide. Traditional high-bandwidth memory solutions struggle to keep pace with the data demands of modern large language models. d-Matrix introduced Raptor 3D DRAM to bridge the gap between the speed of SRAM and the capacity of HBM. This stacked memory architecture aims to deliver the throughput required for AI inference without the prohibitive energy costs of current standards.

New stacked memory architecture bridges SRAM speed and HBM capacity

The Raptor design fundamentally restructures how memory sits relative to the processor. d-Matrix stacks DRAM chips beneath the logic die rather than placing logic on top of memory. This physical arrangement allows the system to drop the traditional PHY layer, which reduces latency and saves space. The result is a memory module that integrates directly with compute resources for faster data access.

Raptor 3D DRAM Specifications

• Bandwidth: ~100 TB/s
• Energy Efficiency: 0.3–0.37 pJ/bit
• Power Consumption: ~300 W (I/O)
• Capacity: 32 GB per single-high stack
• Density: ~½ of HBM4

Performance metrics for Raptor show a significant leap in efficiency over existing HBM technologies. The chip delivers approximately 100 TB/s of bandwidth while consuming roughly 300 W for I/O operations. Energy efficiency measures between 0.3 and 0.37 pJ/bit, which is nearly ten times better than the ~5 pJ/bit typical of HBM. Each single-high stack provides 32 GB of capacity, offering about half the density of HBM4.

d-Matrix claims the architecture achieves SRAM-class bandwidth with magnitudes higher efficiency than HBM. The company states the design mitigates thermal and reliability challenges often associated with 3D stacking. While specific technical details on heat dissipation remain unconfirmed, the structural shift places DRAM below the logic die to manage heat. This configuration targets AI infrastructure providers who need to expand KV cache sizes without doubling power bills.

Raptor 3D DRAM currently exists as a technical proposal from d-Matrix for AI data problems. The company has not yet released pricing or availability dates for commercial deployment. The focus remains on demonstrating that stacked DRAM beneath logic can outperform HBM in energy per bit. Buyers should watch for further development as the industry seeks alternatives to HBM's power limitations.