AMD Partners With Taiwanese OAST Firms On Next-Gen EFB Technology R&D

AMD has partnered with multiple Taiwanese advanced packaging firms to develop next-generation Elevated Fanout Bridge (EFB) technology. The collaboration aims to advance wafer-based 2.5D bridge interconnect solutions for future processors and accelerators.

Collaboration with ASE, SPIL, and PTI to advance wafer-based interconnects.

The new EFB variant builds upon the architecture previously deployed in AMD Instinct MI200 series GPU accelerators. AMD works with partners including ASE, SPIL, and PTI to co-develop and validate this evolutionary packaging approach. The technology significantly improves interconnect bandwidth and power efficiency while supporting large-scale high-bandwidth connections.

AMD successfully validated the industry's first 2.5D panel-level EFB interconnect technology with PTI during earlier development phases. The company states that the enhanced architecture provides strong support for upcoming Venice CPUs. Customers can deploy more efficient AI systems using this packaging method, which improves overall economic benefits compared to previous iterations.

EFB serves as a 2.5D heterogeneous integration solution that bridges components at the wafer level. AMD previously utilized this technology in its Instinct MI200 series GPU accelerators before transitioning to next-generation designs. The current partnership focuses on refining interconnect performance for future CPU and accelerator generations.