ASML Hyper NA EUV Blueprint Revealed: Shrinks 5nm Circuits by Over One-Third

ASML and Zeiss have published a peer-reviewed paper detailing the Hyper NA EUV lithography machine, a critical step for manufacturers needing to print circuits smaller than 5nm in a single exposure. This development matters because it offers a path to shrink feature sizes by over one-third compared to existing High NA EUV equipment, which helps chipmakers sustain Moore's Law as physical limits tighten. Buyers in the advanced semiconductor sector should watch this closely, as the technology targets the 5nm node and beyond.

Hyper NA EUV boosts numerical aperture to 0.75 for single-exposure 5nm printing

The core innovation lies in the numerical aperture, which jumps from 0.55 in High NA systems to at least 0.75 in the new Hyper NA design. This increase allows the machine to resolve circuit features as small as 5nm without requiring multiple exposure steps. The announcement follows a timeline where Intel, Samsung, SK Hynix, and TSMC are expected to adopt High NA EUV between now and 2030.

Spec comparison

A key advantage of the Hyper NA architecture is its compatibility with existing infrastructure. ASML states that existing EUV light sources and Zeiss mirrors can be reused, which minimizes the need for a complete rebuild of manufacturing facilities. This design choice aims to reduce the capital expenditure burden for fabs transitioning to the next generation of lithography.

The source indicates that Hyper NA is expected to be ready for production around 2035, roughly ten years after the High NA timeline begins. However, ASML has not yet committed to mass production of the Hyper NA machine. This uncertainty means chipmakers are still planning their long-term capital allocation based on High NA adoption rates rather than Hyper NA availability.