AMD is expanding its EPYC server CPU portfolio to address the evolving needs of AI and cloud infrastructure. The company plans to introduce more specialized, workload-specific SKUs rather than relying on a single general-purpose design. This strategic shift aims to provide tailored solutions for different computing tasks within data centers.
Venice architecture features general-purpose server CPUs with up to 256 cores
The upcoming Venice architecture will feature general-purpose server CPUs with up to 256 cores. AMD is also developing Verona, a distinct processor codenamed for AI infrastructure. These chips will be part of a broader family optimized for throughput, power efficiency, and cost. Lisa Su stated that the industry requires a diverse range of CPUs for general operations, head nodes, and agentic AI tasks.
AMD expects the total available market for server CPUs to grow at a 35% compound annual growth rate. The company projects this market will reach $120 billion by 2030. To capture this growth, AMD is already working on the Zen 7 architecture while refining its current lineup. The Venice family includes models optimized for performance per watt and performance per dollar.
A key uncertainty remains regarding the silicon configuration for CPUs targeting agentic AI workloads. It is currently unknown whether these processors will use separate silicon designs or reuse general-purpose server silicon with adjusted clocks and cache. AMD has not yet confirmed if these specialized AI chips will diverge significantly from standard server architectures.
Lisa Su emphasized that AMD is building multiple types of models, including throughput, power, cost, and AI infrastructure optimized variants. The Verona processor represents the first EPYC CPU purpose-built specifically for AI infrastructure. This approach allows AMD to offer a broad portfolio that meets the distinct requirements of modern data center workloads.
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